Mentor Graphics Unveils Powerful Synthesis Tool to Meet Requirements of Next-Generation Programmable Logic Design

PARIS--(BUSINESS WIRE)--March 4, 2002--Mentor Graphics Corporation (Nasdaq:MENT - news), the leader in programmable logic design solutions, today unveiled the Precision Synthesis(TM) environment, a synthesis platform that maximizes the performance of both existing programmable logic devices (PLD) and next-generation, multi-million gate field programmable system-on-chip (FPSoC) devices.

Powered in part by the company's proven Exemplar(TM) technology, Precision Synthesis is the linchpin to a company-wide initiative to provide a comprehensive tool suite, from design creation through verification and system integration, and intellectual property cores, for the broad spectrum of FPGA designs.

Continued advancements in FPGA semiconductor technology, especially in the areas of high-speed design and system-level integration, drive the need for next-generation synthesis tools. Mentor Graphics collaborated with programmable device market leaders, Altera Corp. (Nasdaq:ALTR - news), Lattice Semiconductor, Inc. (Nasdaq:LSCC - news) and Xilinx, Inc. (Nasdaq:XLNX - news) throughout the product development process. The new tool delivers a scalable synthesis platform available for designers implementing a full-range of programmable logic devices, including the Stratix(TM) and Excalibur(TM) architectures from Altera and the new Virtex(TM)-II Platform FPGAs by Xilinx.

"Synthesis plays a pivotal role in enabling Mentor to extend its leadership in the field programmable logic design market," said Dr. Walden C. Rhines, chairman of the board and chief executive officer for Mentor Graphics. "Precision Synthesis is a rich and highly productive design environment that delivers excellent results, allowing our customers to take full advantage of next-generation programmable logic technology that industry-leading companies such as Altera, Lattice and Xilinx deliver today."

The tool features an intuitive graphical user interface, a new suite of optimization algorithms (A.S.E. optimization) and a state-of-the-art-timing engine (PreciseTime) that delivers the industry's most accurate timing analysis. (For more technical details, please see the enclosed overview.)

"Precision Synthesis delivers usability features that make it easier to synthesize designs which deliver better results," said Alwin Hitzler, senior design consultant for Siemens Industrial Solutions and Services Group. "The intuitive interface allows synthesis operations to be completed with just a mouse click. More intelligence is built into each operation, making it easier to produce good results the first time a design goes through the tool. Combined with the fast synthesis run-times and interactive schematic viewing, we can increase our productivity for very large, high-speed designs. We look forward to running Precision Synthesis on our next project."

According to Hitoshi Matsumoto, senior design engineer for Mitsubishi Electric Corporation's Communication Systems Development Center, "One of our biggest challenges is that we spend a considerable amount of time fixing timing issues in place and route, and we don't get enough information from synthesis tools to make good decisions. We feel that the advanced design analysis capabilities in the Precision Synthesis environment, with its PreciseTime feature, will help us correct timing issues in the front-end, save us time in place and route, and result in higher performance for our designs."

Precision Synthesis Forms Heart of Mentor's FPGA Product Line

Mentor Graphics continues to deploy research and development resources to address the challenges of next-generation programmable logic design. In the coming months, the company will continue to deliver on a roadmap that includes physical and high-level synthesis. Mentor continues to offer a full suite of FPGA solutions, including products for design creation, verification, co-verification, embedded systems, intellectual property and FPGA on board solutions, including PCB layout and signal integrity solutions. Mentor provides superior support for all of its FPGA solutions with its STAR-award winning Customer Support team.

Availability

Precision Synthesis is currently in beta release and will be available to all customers in Q2 2002. The tool runs on Windows NT, 98, 2000 and XP, Solaris and HP-UX platforms. Precision Synthesis will be provided as a replacement technology for LeonardoSpectrum(TM) level three customers. For LeonardoSpectrum level one, LeonardoSpectrum level two and FPGA Advantage Personal Edition users, Mentor Graphics will continue to offer ongoing device support and continued software releases to these products, with an option to upgrade to Precision Synthesis if desired. For more information please call 800/632-3742 or visit www.mentor.com/synthesis/precision

About Mentor Graphics

Mentor Graphics Corporation (Nasdaq:MENT - news) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of more than $600 million and employs approximately 3,100 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Ore. 97070-7777; Silicon Valley headquarters are located at 1001 Ridder Park Drive, San Jose, Calif. 95131-2314. World Wide Web site: www.mentor.com.

Precision Synthesis Technical Overview

Precision Synthesis addresses the requirements of both current and next-generation programmable logic design. The synthesis solution features an intuitive graphical user interface, a new suite of optimization algorithms (A.S.E. optimization) and a state-of-the-art timing engine (PreciseTime) that delivers the industry's most accurate timing analysis.

    Intuitive Design Flow Eases Next-Generation Programmable Device
    Design

Precision Synthesis accelerates time-to-productivity for both novice and experienced programmable logic designers, equipping designers with intuitive operations that make achieving design goals easier. At the heart of the push-button flow is the Design Center that includes two distinct views -- design view and hierarchy view. Precision's design view allows designers to perform all operations with a click of the mouse, including adding or editing design and constraint files, or viewing synthesis and place and route report files. The Design Center's design view also provides revision management, enabling designers to control design iterations.

Precision's unique hierarchy view is directly linked to a schematic viewer, enabling designers to find any object in the design and apply constraints directly to the object. This eliminates the need to launch additional design editors for entering constraints, which saves time, increases productivity and eliminates user frustration when working with large designs.

Precision Synthesis also supports Synopsys Design Constraints (SDC), ensuring compatibility with application specific integrated circuits (ASIC) flows and easy migration of traditional ASIC intellectual property (IP) and cores to field programmable gate arrays (FPGAs).

A.S.E. Optimization Raises the Bar on Design Performance

Precision Synthesis includes a suite of unique algorithms called Architecture Signature Extraction(TM) (A.S.E.) optimization that automatically focuses specific optimizations on areas of the design that likely hinder overall performance, such as finite state machines (FSM), cross-hierarchical paths, or paths with excessive combinational logic. ASE(TM) optimization uses an automated, heuristic approach to deliver smaller designs that achieve project requirements in less time by reducing the manual process of isolating and correcting problem areas in a design. ASE optimization performs advanced technique tasks such as Look-up Table (LUT) merging, logic tunneling, register re-timing and timing-driven I/O block (IOB) mapping to reach the target performance without the need for iterative manual user intervention.

Performance increases have measured in excess of 70 percent on critical paths where Precision's ASE optimization recognized and applied register retiming to a path to meet design performance goals. In addition, ASE optimization's FSM optimization technology delivers a 50 percent performance improvement over competing synthesis solutions.

PreciseTime Drives Performance and Provides Rapid Design Analysis

Precision Synthesis includes PreciseTime, a new incremental timing engine that provides advanced functionality previously found only in stand-alone static timing analysis tools. PreciseTime automatically isolates critical timing path violations that can be missed by other synthesis tools. After identifying the critical timing paths, Precision Synthesis invokes ASE optimization to repair all marginal timing problems prior to programming the FPGA. PreciseTime also provides advanced constraint-driven timing analysis. With a single mouse click, users can modify design constraints on critical paths and view the results instantly, enabling designers to consider design tradeoffs that can improve performance. Unlike other tools that require running additional synthesis iterations for design analysis, PreciseTime saves designers' time and increases their productivity prior to going to place and route.

Mentor Graphics and xCalibre are registered trademarks of Mentor Graphics Corp. Architecture Signature Extraction, ASE, Precision Synthesis, LeonardoSpectrum and Exemplar are trademarks of Mentor Graphics. Excalibur and Stratix are trademarks of Altera Corp. Virtex is a trademark of Xilinx, Inc. All other company and/or product names are the trademarks and/or registered trademarks of their respective owners.

     Mentor Graphics
     Keri Wilson, 503/685-1359
     keri_wilson@mentor.com
     or
     Weber Shandwick Worldwide
     Jeremiah Glodoveza, 415/352-2628 ext. 136
     jglodoveza@webershandwick.com